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Your search returned 26 records. Click on the hyperlinks to view further details of Titles.. |
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Magazine Name : Ieee Journal Of Solid-State Circuits
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Year : 2001 Volume number : 36 Issue: 11 |
An Embedded 32-B Microprocessor Core For Low-Power And High-Performance Application
(Article)
Subject:
Cache Memories
,
Cmos Integrated Circuits
,
Microprocessors
Author:
Lawrence T.
Clark
Eric J.
Hoffman
page:
1599
-
1608
The First Majc Microprocessor: A Dual Cpu System-On-A-Chip
(Article)
Subject:
Clock Distribution
,
Cmos Integrated Circuits
,
Cmp
,
Computer Architecture
Author:
Andre
Kowalczyk
Victor
Adler
page:
1609
-
1616
A 0.18-Um Cmos Ia-32 Processor With A 4-Ghz Integer Execution Unit
(Article)
Subject:
Adders
,
Clocks
,
Cmos Digital Integrated Circuits,
,
Computer Architecture
Author:
Glenn
Hinton
Michael
Upton
page:
1617
-
1627
A 1.8-Ghz Instruction Window Buffer For An Out-Of-Order Microprocessor Core
(Article)
Subject:
Cmos Integrated Circuits
,
Computer Architecture
,
High-Speed Integrated Circuits
,
Integrated Circuit Design
Author:
Jens
Leenstra
Antje
Muller
page:
1628
-
1635
Sub-500-Ps 64-B Alus In 0.18-Um Soi/Bulk Cmos: Design And Scaling Trends
(Article)
Subject:
High-Performance Adders
,
High-Performance And Low-Power Cmos Design
,
Silicon-On-Insulator Technology
Author:
Sanu K.
Mathew
K.
Krishnamurthy
page:
1636
-
1646
A Multigigahertz Clocking Scheme For The Pentium 4 Microprocessor
(Article)
Subject:
Clock Distribution
,
Clock Generation
,
Glitch Protection
,
Jitter Reduction
Author:
Nasser A.
Kurd
Javed S.
Barkatullah
page:
1647
-
1653
Rotary Traveling-Wave Oscillator Arrays: A New Clock Technology
(Article)
Subject:
Clocks
,
Mosfet Oscillators
,
Phase-Looked Oscillators
,
Phased Array
Author:
John
Wood
Terence C.
Edwards
page:
1654
-
1665
A 2.5-Ghz Four-Phase Clock Generator With Scalable No-Feedback-Loop Architecture
(Article)
Subject:
Clock And Data Recovery
,
Dll
,
Multichannel
,
Multiphase Clock
Author:
Kouichi
Yamaguchi
Muneo
Fukaishi
page:
1666
-
1672
A Low-Jitter 125-1250-Mhz Process-Independent And Ripple-Poleless 0.18-Um Cmos Pll Based On A Sample-Reset Loop Filter
(Article)
Subject:
Cmos
,
Frequency Synthesizer
,
Jitter
,
Oscillators
Author:
Adrian
Maxim
Baker
Scott
page:
1673
-
1683
A Serial-Link Transceiver Based On 8-Gsamples/S A/D And D/A Converters In 0.25-Um Cmos
(Article)
Subject:
Analog-Digital Conversion
,
Data Transmission
,
Digital-Analog Conversion
,
Equalization
Author:
Chih-Kong Ken
Yang
Vladimir
Stojanovic
page:
1684
-
1692
A 4-Ghz Clock System For A High-Performance System-On-A-Chip Design
(Article)
Subject:
Analog-Digital Integrated Circuits
,
Gain-Boosting
,
Phase-Locked Loops
,
Supply Noise
Author:
Joseph M.
Ingino
Vincent R. Von
Kaenel
page:
1693
-
1698
A Dual-Mode Nand Flash Memory: 1-Gb Multilevel And High-Performance 512-Mb Single-Level Modes
(Article)
Subject:
Cmos Memory Integrated Circuits
,
Eprom
,
Flash Memory
,
Floating Gate Coupling
Author:
Taehee
Cho
Yeong-Taek
Lee
page:
1700
-
1706
A 126.6-Mm2 And-Type 512-Mb Flash Memory With 1.8-V Power Supply
(Article)
Subject:
Flash Memory
,
Low-Voltage Operation
,
Multilevel Technique
Author:
Tatsuya
Ishii
Kazuyoshi
Oshima
page:
1707
-
1712
A 76-Mm2 8-Mb Chain Ferroelectric Memory
(Article)
Subject:
Ferroelectric Memory
,
Nonvolatile Memory
,
Random Access Memory (Ram)
Author:
Daisaburo
Takashima
Yoshiaki
Takeuchi
page:
1713
-
1720
A Multigigabit Dram Technology With 6f2 Open-Bitline Cell, Distributed Overdriven Sensing, And Stacked-Flash Fuse
(Article)
Subject:
Array Noise
,
Dram
,
Low Voltage And High Speed
,
Memory Cell
Author:
Tsugio
Takahashi
Tomonori
Sekiguchi
page:
1721
-
1727
A 1.0-V 230-Mhz Column Access Embedded Dram For Portable Mpeg Applications
(Article)
Subject:
Cmos Memory Integrated Circuits
,
Dram Chips
,
Multimedia Communication
Author:
Shigeki
Tomishima
Takaharu
Tsuji
page:
1728
-
1737
Universal-Vdd 0.65-2.0-V 32-Kb Cache Using A Voltage-Adapted Timing-Generation Scheme And Lithographically Symmetrical Cell
(Article)
Subject:
Cache Memory
,
Low Power
,
Self-Timing
,
Sram Cell
Author:
Kenichi
Osada
Jinuk Luke
Shin
page:
1738
-
1744
Analysis And Compensation Of The Bitline Multiplexer In Sram Current Sense Amplifiers
(Article)
Subject:
Bitline Multiplexer
,
Current Sense Amplifier
,
Current Sensing
,
Mos Transistor Switch
Author:
Berhard
Wicht
Steffen
Paul
page:
1745
-
1755
An 80/20-Mhz 160-Mw Multimedia Processor Integrated With Embedded Dram, Mpeg-4 Accelerator, And 3-D Rendering Engine For Mobile Applications
(Article)
Subject:
3-D Graphics Processing
,
Embedded Dram
,
Low Power
,
Mobile Application
Author:
Chi-Weon
Yoon
Ramchan
Woo
page:
1758
-
1767
A 250-Mhz Single-Chip Multiprocessor For Audio And Video Signal Processing
(Article)
Subject:
Bitstream Processing
,
Clock Gating
,
Coarse-Grained Parallelism
,
Fine-Grained Parallelism
Author:
Tatsuya
Koyama
Keisuke
Inoue
page:
1768
-
1774
A 150-Mhz Graphics Rendering Processor With 256-Mb Embedded Dram
(Article)
Subject:
Delay Estimation
,
Design Methodology
,
Signal Integrity
,
Very Large-Scale Integration Design
Author:
Aurangzeb
Khan
Hidetaka
Magoshi
page:
1775
-
1784
A Mixed-Signal 0.18-Um Cmos Soc For Dvd Systems With 432-Msample/S Prml Read Channel And 16-Mb Embedded Dram
(Article)
Subject:
Cmos
,
Dvd
,
Embedded Dram
,
Flash Adc
Author:
Takashi
Yamamoto
Shin-Ichi
Gotoh
page:
1785
-
1794
A 300-Mhz Fixed-Delay Tree Search-Dfe Analog Cmos Disk-Drive Read Channel
(Article)
Subject:
Tree Search
,
Cmos Active Pixel
,
Disk Drive
,
Read Channel
Author:
Derrick
Chunkai
Daniel Qicheng
Sun
page:
1795
-
1807
An Energy-Efficient Reconfigurable Public-Key Cryptography Processor
(Article)
Subject:
Energy-Efficient Reconfigurable
,
Processor
,
Cryptography
Author:
James
Goodman
Anantha P
Chandrakasan
page:
1808
-
1820
Vlsi Implementation Of A 100-Uw Multirate Fsk Receiver
(Article)
Subject:
Discrete Fourier Transforms
,
Frequency Modulation
,
Satellite Communication
,
Signal Sampling
Author:
E.
Grayver
page:
1821
-
1828
80-Mb/S Qpsk And 72-Mb/S 64-Qam Flexible And Scalable Digital Ofdm Transceiver Asics For Wireless Local Area Networks In The 5-Ghz Band
(Article)
Subject:
Adaptive Equalization
,
Burst Acquisition
,
Digital Signal Processing
,
Orthogonal Frequency Division Multiplex
Author:
Wolfgang
Eberle
Veerle
Derudder
page:
1829
-
1838
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